Celoxica Delivers ESL Implementation Path for Altera's HardCopy II Structured ASICs; Celoxica Introduces C-based ESL Design and Synthesis Flow To Dramatically Reduce Multi-Million Gate Simulation and Verification Times
ABINGDON, England—(BUSINESS WIRE)—June 13, 2005—
Celoxica Ltd., the leading provider of C-based
electronic system level (ESL) design and synthesis solutions, today
announced support for Altera's HardCopy II structured ASIC family in
Agility Compiler for SystemC and the DK Design Suite.
The tools and methodology support a seamless flow from algorithm
and transaction level model (TLM) to Stratix II FPGA prototype, and
then to HardCopy II structured ASIC. The ESL design flow and FPGA
front-end speeds verification and design productivity and enables
algorithm acceleration in Structured ASIC by providing a direct path
for silicon implementation from SystemC models and ANSI-C software.
"There is an increasing emphasis in the volume digital-image and
signal-processing markets to accelerate algorithms in flexible,
low-power, high-performance silicon, with more of the design and
verification effort being moved to the system level to tackle the
inherent complexity," said Jeff Jussel vice president of marketing for
Celoxica. "Couple this with relentless pressures on time-to-market,
cost and designer productivity, our C-based design and synthesis
technology provides the most cost-effective design and implementation
route from Algorithm and TLM to HardCopy II structured ASIC."
Targeted at the growing number of designers who have less time to
develop and differentiate high-performance complex designs, Celoxica's
ESL tools dramatically reduce multi-million gate simulation and
verification times compared to traditional design flows and speed
implementation by automatically generating RTL descriptions and EDIF
netlists from SystemC and Handel-C. Designers using Altera's HardCopy
II can exploit the array of hardware logic optimizations available in
the Agility Compiler and DK Design Suite to quickly develop
high-performance, area-efficient implementations.
"HardCopy II structured ASIC provides the only seamless prototype
to structured ASIC production migration in the market," said Alain
Bismuth, VP HardCopy Business Group, Altera Corporation. "Supported by
Celoxica's Agility Compiler for SystemC and DK Design Suite, designers
can leverage the benefits of C-based ESL design with HDL and
block-based approaches. This integration provides a common development
platform for system, algorithm and hardware designers when targeting
the HardCopy II structured ASIC."
About Celoxica
An innovator in Electronic System Level (ESL) design, Celoxica is
turning software into silicon by supplying the design tools, boards,
IP and services that enable the next generation of advanced electronic
product design. Celoxica technology raises design abstraction to the
algorithm level, accelerating productivity and lowering risk and costs
by generating semiconductor hardware directly from C-based software
descriptions. Adding to a growing installed base, Celoxica provides
the world's most widely used C-based behavioral design and synthesis
solutions to companies developing semiconductor products in markets
such as consumer electronics, defense and aerospace, automotive,
industrial and security. For more information, visit:
www.celoxica.com.
Celoxica and the Celoxica logo are trademarks of Celoxica, Ltd.
All other brand names and product names are the property of their
respective owners.
Contact:
Celoxica Ltd.
Jeff Jussel, 512-795-8170
Email Contact
or
VitalCom Marketing & PR
Karen Tyrrell, 650-366-8212 ext. 204
Email Contact
or
Neesham PR
Allan Edwards, +44-1442-879-222
Email Contact
